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Real world multicore embedded systems : a practical approach / Bryon Moyer.
Author
Moyer, Bryon
[Browse]
Format
Book
Language
English
Εdition
1st edition
Published/Created
Oxford : Newnes, 2013.
Description
1 online resource (xxii, 623 pages) : illustrations (some color).
Availability
Available Online
O'Reilly Online Learning: Academic/Public Library Edition
Details
Subject(s)
Embedded computer systems
[Browse]
Multiprocessors
[Browse]
Related name
Moyer, Bryon
[Browse]
Series
Expert guide series.
[More in this series]
Expert guide Real world multicore embedded systems
Summary note
This Expert Guide gives you the techniques and technologies in embedded multicore to optimally design and implement your embedded system. Written by experts with a solutions focus, this encyclopedic reference gives you an indispensable aid to tackling the day-to-day problems when building and managing multicore embedded systems. Following an embedded system design path from start to finish, our team of experts takes you from architecture, through hardware implementation to software programming and debug. With this book you will learn: What motivates multicor
Notes
Description based upon print version of record.
Bibliographic references
Includes bibliographical references and index.
Language note
English
Contents
Front Cover; Real World Multicore Embedded Systems; Copyright Page; Contents; About the Editor; About the Authors; 1 Introduction and Roadmap; Multicore is here; Scope; Who should read this book?; Organization and roadmap; Concurrency; Architecture; High-level architecture; Memory architecture; Interconnect; Infrastructure; Operating systems; Virtualization; Multicore-related libraries; Application software; Languages and tools; Partitioning applications; Synchronization; Hardware assistance; Hardware accelerators; Synchronization hardware; System-level considerations; Bare-metal systems
DebugA roadmap of this book; 2 The Promise and Challenges of Concurrency; Concurrency fundamentals; Two kinds of concurrency; Data parallelism; Functional parallelism; Dependencies; Producers and consumers of data; Loops and dependencies; Shared resources; Summary; 3 Multicore Architectures; The need for multicore architectures; Multicore architecture drivers; Traditional sequential software paradigms break; Scope of multicore hardware architectures; Basic multicore hardware architecture overview; Specific multicore architecture characteristics; Processing architectures
ALU processing architecturesLightweight processing architectures; Mediumweight processing architectures; Heavyweight processing architectures; Communication architectures; Memory architectures; Application specificity; Application-specific platform topologies; Integration of multicore systems, MPSoCs and sub-systems; Programming challenges; Application characteristics; MPSoC analysis, debug and verification; Shortcomings and solutions; MPSoC parallel programming; Parallel software and MPSoCs; Summary; References; 4 Memory Models for Embedded Multicore Architecture; Introduction; Memory types
RAMDRAM; SRAM; NVRAM; DPRAM; EPROM; Flash; SD-MMC; Hard Disk; Memory architecture; Cache; Translation lookaside buffer (TLB); Instruction cache; Data cache; Cache customization; Virtual memory; Scratch pad; Software overlays; DMA; DRAM; Special-purpose memory; Memory structure of multicore architecture; Shared memory architecture; Uniform memory access (UMA); Non-uniform memory access (NUMA); Distributed memory architecture; Cache memory in multicore chips; Cache coherency; Directory-based cache coherence protocol; Snoopy cache coherence protocol; MESI cache coherence protocol
Cache-related performance issuesFalse sharing and the ping-pong effect; Processor affinity; Cache locking; Transactional memory; Software transactional memory; Hardware transactional memory; Hybrid transactional memory; Summary; References; 5 Design Considerations for Multicore SoC Interconnections; Introduction; Importance of interconnections in an SoC; Terminology; Organization of the chapter; Communication activity in multicore SoCs; Transaction-based communication; Storage-oriented transactions; Addressed Accesses; Non-addressed storage-oriented transactions; Messages; Interrupts
Concurrency of communication and segregation of traffic
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ISBN
1-299-26181-7
0-12-391461-2
OCLC
834587505
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