Electrostatic discharge protection : advances and applications - Liou, Juin J.; Iniewski, Krzysztof, 1960- (Boca Raton, Florida : CRC Press, 2016)
This book delivers timely coverage of component- and system-level electrostatic discharge (ESD) protection for semiconductor devices and integrated circuits. Illustrated with tables, figures, and case studies, the text brings together contributions from internationally respected researchers and engineers with expertise in ESD design, optimization, modeling, simulation, and characterization. It provides readers with a deeper understanding of ESD events, ESD protection design principles, important aspects of the modeling and simulation of ESD protection solutions, and vital processes including Si CMOS, Si BCD, Si SOI, and GaN technologies.
chapter 1. Introduction to electrostatic discharge protection / Juin J. Liou -- chapter 2. Design of component-level on-chip ESD protection for integrated circuits / Charvaka Duvvury -- chapter 3. ESD and EOS : failure mechanisms and reliability / Nathaniel Peachey and Kevin Mello -- chapter 4. ESD, EOS, and latch-up test methods and associated reliability concerns / Alan W. Righter -- chapter 5. Design of power-rail ESD clamp circuits with gate-leakage consideration in nanoscale CMOS technology / Ming-Dou Ker and Chih-Ting Yeh -- chapter 6. ESD protection in automotive integrated circuit applications / Javier A. Salcedo and Jean-Jacques Hajjar -- chapter 7. ESD sensitivity of GaN-based electronic devices / Gaudenzio Meneghesso, Matteo Meneghini, and Enrico Zanoni -- chapter 8. ESD protection circuits using NMOS parasitic bipolar transistor / Teruo Suzuki -- chapter 9. ESD development in foundry processes / Jim Vinson -- chapter 10. Compact modeling of semiconductor devices for electrostatic discharge protection applications / Zhenghao Gan and Waisum wong -- chapter 11. Advanced TCAD methods for system-level ESD design / Vladislav A. Vashchenko and Andrei A. Shibkov -- chapter 12. ESD protection of failsafe and voltage-tolerant signal pins / David L. Catlett, Jr., Roger A. Cline, and Ponnarith Pok -- chapter 13. ESD design and optimization in advanced CMOS SOI technology / You Li.
Description based upon print version of record.
Includes bibliographical references.
English
Description based on online resource; title from PDF title page (ebrary, viewed December 12, 2015).
Keywords: Semiconductors -- Protection; Electric discharges; Integrated circuits -- Protection