Details

Subject(s)

• Metal oxide semiconductors, Complementary—Testing [Browse]

Editor of compilation

• Goel, Sandeep K. [Browse]
• Chakrabarty, Krishnendu [Browse]

Series

• Devices, Circuits, and Systems [More in this series]
• Devices, circuits, and systems

Summary note

Advances in design methods and process technologies have resulted in a continuous increase in the complexity of integrated circuits (ICs). However, the increased complexity and nanometer-size features of modern ICs make them susceptible to manufacturing defects, as well as performance and quality issues. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits covers common problems in areas such as process variations, power supply noise, crosstalk, resistive opens/bridges, and design-for-manufacturing (DfM)-related rule violations. The book also addresses testing

Notes

Description based upon print version of record.

Bibliographic references

Includes bibliographical references.

Source of description

Description based on print version record.

Language note

English

Contents

• section I. Timing-aware ATPG
• section II. Faster-than-at-speed
• section III. Alternative methods
• section Ivolume SDD metrics.

Show 1 more Contents items

Other title(s)

Testing for small-delay defects in nanoscale Complementary Metal-Oxide Semiconductor integrated circuits

ISBN

• 9781315217819
• 1315217813
• 9781439829417
• 1439829411

OCLC

• 868971304
• 859916982
• 900292029

Doi

10.1201/b15549

Statement on responsible collection description

Princeton University Library aims to describe library materials in a manner that is respectful to the individuals and communities who create, use, and are represented in the collections we manage. Read more...